Alif Semiconductor /AE512F80F55D5AS_CM55_HP_View /LPUART /UART_RFW

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as UART_RFW

RFPE=Val_0x0, RFFE=Val_0x0

Description

Rx FIFO Write Register

Fields

RFWD	Rx FIFO Write Data When FIFOs are enabled, the data that is written to this bit is pushed into the Rx FIFO. Each consecutive write pushes the new data to the next write location in the Rx FIFO. When FIFOs are not enabled, the data that is written to this bit is pushed into the UART_RBR[RBR].
RFPE	Rx FIFO Parity Error When FIFOs are enabled, this bit is used to write parity error detection information to the Rx FIFO. When FIFOs are not enabled, this bit is used to write parity error detection information to the UART_RBR[RBR]. 0 (Val_0x0): Parity error disabled 1 (Val_0x1): Parity error enabled
RFFE	Rx FIFO Framing Error When FIFOs are enabled, this bit is used to write framing error detection information to the Rx FIFO. When FIFOs are not enabled, this bit is used to write framing error detection information to the UART_RBR[RBR]. 0 (Val_0x0): Frame error disabled 1 (Val_0x1): Frame error enabled

Links

() ()